Software Development Leader

Deliver Cutting-Edge Solutions
Technical Leader
Effective Global Collaboration

Demonstrates extensive technical and leadership experience yielding 20 issued US patents and 27 publications. Broad expertise designing, testing, and delivering cutting-edge software that drives profitable revenue. Collaborative problem solver who guides international teams to invent advanced technology and tools. Expert in all facets of Software Development Life Cycle (SDLC). Coach and mentor who promotes the use of best practices, agile methods, and commonsense solutions. Industry leader and expert who influences and co-authors various industry standards.

Skill Highlights

  • Board and System Test
  • Coaching and Mentoring
  • Device Drivers
  • Domain Specific Languages (DSL)
  • Electrical Engineering
  • Embedded Systems
  • Network Systems
  • Object-Oriented OOA, OOD, OOP
  • Operating Systems
  • Parsers
  • Project Leadership and Management
  • Software Engineering
  • Spearhead Industry Standards

Technical Skills

LANGUAGES

  • bash
  • BSDL
  • C++
  • C
  • C#
  • HTML
  • IronPython
  • Java
  • ksh
  • MATLAB/Octave
  • myHDL
  • Python
  • SQL
  • Tcl
  • UML
  • Verilog
  • VHDL
  • XML

TECHNOLOGIES

  • .NET Framework
  • Agile Methods
  • C++ boost
  • C++ STL
  • Qt5
  • Software Design Patterns and Anti-patterns
  • Software Development Life Cycle (SDLC)
  • Software Wrapper Interface Generator (SWIG)
  • State Machine Compiler (SMC)
  • Swing
  • Tk/Tkinter
  • wxWindows
  • Test Driven Development (TDD)

(R)DBMS

  • Hibernate
  • MS Access
  • MySQL
  • NHibernate
  • SQLAlchemy
  • Sqlite3

PLATFORMS

  • Linux (Debian, CentOS, Ubuntu, RedHat, Knoppix)
  • Stand-alone
  • Windows
  • VxWorks

Exploring remote work anywhere in the US – consulting, contract, and full time opportunities.

US Patents and Publications may be found on my LinkedIn profile.

My resume is available here.


GitHub Projects

P2654Simulations
This repository is my playground where I am developing myHDL simulation logic modules to simulate different use cases for the IEEE P2654 and P1687.1 working groups so we can see how our ideas fit with real examples.
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WordCloudTool
Application to create a word cloud from many different file inputs.
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telnetsrvlib
Fork of the ianepperson/telnetsrvlib repository to port the code to Python3

My Publications

European Test Symposium (ETS)
This repository is a library of my publications at the European Test Symposium.

Home Projects

Linux/Apache2/MySQL/PHP (LAMP) Server / Jekyll Server Experimentation
The page chronicles my experimentation with a low cost home web server. It uses a Debian based Pogoplug Pro with a separate hard drive to store the OS and data. The server resides behind a DMZ firewall isolating my local network router from the server.
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Network Attached Storage (NAS) Experimentation
The page chronicles my experimentation into finding a sufficient Network Attached Storage solution for my home storage needs.
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Print Server Experimentation
The page chronicles my experimentation into finding a sufficient Print Server solution for my home printing needs. My requirements have changed over time as technology changed and services like Google Cloudprint arrived.

Standards Projects

IEEE Std 1581 - IEEE Standard for Static Component Interconnection Test Protocol and Architecture
IEEE Std 1581 defines a low-cost method for testing the interconnection of discrete, complex memory integrated circuits (ICs) where additional pins for testing are not available and implementing boundary scan (IEEE Std 1149.1TM) is not feasible. This standard describes the implementation rules for the test logic and test mode access/exit methods in compliant ICs. The standard is limited to the behavioral description of the implementation and will not include the technical design for the test logic or test mode control circuitry.
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IEEE Std 1687 - IEEE Standard for Access and Control of Instrumentation Embedded within a Semiconductor Device
A methodology for accessing instrumentation embedded within a semiconductor device, without defining the instruments or their features themselves, via the IEEE 1149.1TM test access port (TAP) and/or other signals, is described in this standard. The elements of the methodology include a hardware architecture for the on-chip network connecting the instruments to the chip pins, a hardware description language to describe this network, and a software language and protocol for communicating with the instruments via this network.
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IEEE P1687.1 - Standard for the Application of Interfaces and Controllers to Access 1687 IJTAG Networks Embedded Within Semiconductor Devices
This standard extends or expands the application of the IEEE 1687-2014 standard to allow the use of, and description of, a broad range of device interfaces and their associated controllers to access IEEE 1687 networks embedded within semiconductor devices. For example, these interfaces may include one or more of I2C, SPI, SWD, IEEE 1149.7 and/or other similar source synchronous clock interfaces.
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IEEE P2654 - Standard for System Test Access Management (STAM) to Enable Use of Sub-System Test Capabilities at Higher Architectural Levels
This standard addresses use/ reuse of test assets in system context by: 1) defining a representation for behavioral descriptions of pertinent sub-assembly interfaces and of relevant data and protocol transformations; 2) defining methods for utilizing such representations to enhance management of and access to said test assets. In conjunction with existing methods for test access and test management, this will allow the coordination and control of a variety of digital interfaces to devices, boards, and sub-systems to extend test access to board and system levels. This standard does not replace or provide an alternative to existing test interface standards, but aims instead to enable their usage throughout the hierarchy of systems.
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IEEE/TTSC The System JTAG Initiative Group (SJTAG)
Initiative study about access to embedded instruments inside devices via board and system test interfaces.

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